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semiconductor group 1 slb 0587 slb 0587 preliminary data cmos ic for applications where the slb 0586 a has been used, it is possible to replace the slb 0586 a by the slb 0587 if the appropriate external wiring in accordance with the data sheet is maintained. the slb 0587 is a cmos ic and the advanced version of the version slb 0586 a. the ic permits the design of digital electronic phase controls for operation of incandes-cent lamps, low-voltage halogen lamps with in-series connected transformers, and universal as well as split-pole motors. features l phase control for resistive and inductive loads l sensor operation C no machanically moved switching elements l operation possible from several extensions l capable of replacing electromechanical wall switches in conventional light installations l high interference immunity, even against ripple control signals l programming input for selection of three different func- tions (mode a/b/c) l soft start l safety turn-off slb 0587 g Q67106-A8315 p-dso-8-1 (smd) slb 0587 q67100-a8310 p-dip-8 type ordering code package dimmer ic for halogen lamps 09.94 t new type p-dip-8 p-dso-8-1
semiconductor group 2 slb 0587 pin definitions and functions pin configuration (top view) slb 0587 slb 0587 g pin symbol function 1 2 3 4 5 6 7 8 v dd i prog i pll i sync i sen i ext v ss qt reference point (ov) programming input integrator for pll synchronizing input sensor input extension input supply voltage trigger pulse output
semiconductor group 3 slb 0587 figure 1 block diagram
semiconductor group 4 slb 0587 functional description with the slb 0587 it is possible to generate one defined current pulse per line half cycle. together with a triac and a few extra passive components, a line-powered phase-control circuit can be designed. the phase-control angle (turn-on time of the triac) can be set on the two control inputs, pins 5 and 6, of the ic. the voltage supply to the ic in a two-wire connection is ensured by limiting the angle of current flow to approx. 152 . this makes it simple to exchange mechanical wall switches in conven- tional lighting installations. the ics internal logic is synchronized with the line by pll. thus a phase control range independent of the line frequency is obtained. operation with low-voltage halogen lamps in normal, resistive operation of a phase control circuit there is alternately part of the positive and negative line-voltage half cycle applied to the load via the triac that has started to conduct because of the trigger pulse. operation of the circuit with a transformer and low-voltage halogen lamp connected is largely identical to the operation of a normal filament lamp due to the primarily resistive nature of the load. in operation with resistive and inductive portions of load, the zero crossing of the current compared to that of the line voltage line is delayed. in operation with heavily inductive loads (eg an idling transformer after lamp failure), a highly lossy state (half cycle operation) can occur after a fault, leading to thermal destruction of the transformer. control mechanisms integrated into the slb 0587 serve to protect the load from this situation. if, for instance, a trigger pulse is missing in a half cycle because of a fault, there will be a con- siderable increase in current in the transformer into the line shortly after the zero crossing of a voltage wave C after the next firing of the triac at large phase-control angles. if the next trigger pulse comes into phase when the triac is still conducting because of the inductive current lag, it has no effect. it is only the subsequent trigger pulse that will fire the triac again. the case described above, where only one trigger pulse per line cycle leads to firing of the triac, can turn into a steady-state condition in the absence of further measures. the slb 0587 provides the following features to prevent steady-state half-cycle operation: 1) allowance for the conducting state of the triac when setting the trigger pulses. if a trigger pulse, determined by the set firing angle and status of the internal pll, coin- cides with the conducting phase of the triac, the trigger pulse will not be output to the triac until after the zero crossing of the current wave. 2) detection of high saturation currents at angles of current flow of more than 180 by sampling the synchronizing input levels. if the frequency of such peak situation current exceeds a value defined in the ic, there will be a safety cut-out.
semiconductor group 5 slb 0587 3) retriggering if the triac does not remain triggered after the trigger pulse.this can occur in particular on highly inductive loads (idling transformer with a small mag- netizing current) and insensitive triacs. approx. 1.5 ms (1.25 ms at 60 hz) after each trigger pulse from slb 0587 the conducting state on the triac is sampled via pin 4 of the ic. if the triac still remains turned off, one-shot retriggering will follow. if the frequency of retriggering exceeds an internally defined limit value, there will be a cutout. safety cutout the purpose of the safety cutout is to prevent thermal destruction of primarily inductive loads (idling transformer) in the event of very lossy instances of operation. despite the safety pre- cautions that are integrated, you should only use transformers with thermal protection. safety cutout occurs when the count of an 4-bit up/down counter reaches 15. the count is determined by the ratio of the up/down counting rates. the up-counting rate is the appearance of high saturation currents and retriggering. a down counting increment is produced when the count is other than zero at every fifteenth line half-wave. the count is zeroed in the off state and when short line outages are detected. operation (figure 3) the integrated circuit can distinguish the instructions on/off and change of phase control angle by the duration of sensor touching. turning on/off short touching (50 to 400 ms) of the sensor area turns the lamp on or off, depending on its preceding state. the switching process is activated as soon as the sensor is released. setting of the phase control angle if the sensor is touched for a longer period (exceeding 400 ms) the angle of current flow will be varied continuously. it runs accross the control loop in approximately 7.6 s up and down (e.g. bright C dark C bright) until the sensor is released. easy operation, even in the lower brightness range of incandescent lamps, is enabled by the following procedure: the phase control angle is controlled such that the lamp brightness varies physiologically li- near with the operating time and pauses for a short period when the minimum brightness is reached. using r 2 and c 4 (synchronizing input) in the application circuit (figure 4) , the angle of current flow can be controlled for purely resistive loads between 45 and 152 of the half-wave.
semiconductor group 6 slb 0587 control modes of operation starts varying at min. starts varying at pre-touch brightness reversed dimming direction c (pin 2 at v dd ) off max. intermediate softstart to max. off off off max./intermediate repeated dimming mode period of touching the sensor/extension post-touch status post-touch status pre-touch status short (60 to 400 ms) long (more than 400 ms) pre-touch status softstart to stored brightness and varying starts varying at pre-touch brightness reversed dimming direction b (pin 2 open) off max. intermediate softstart to stored brightness from last turn-off off off off max./intermediate repeated dimming starts varying at min. starts varying at pre-touch brightness same dimming direction a (pin 2 at v ss ) off max. intermediate softstart to max. off off off max./intermediate repeated dimming figure 3 control behaviour of the 3 operating modes
semiconductor group 7 slb 0587 figure 2 internal wiring of pins
semiconductor group 8 slb 0587 interference immunity components c 3 , c 6 and r 3 (figure 4) provide for a stable operating voltage and thus for error- free working of the circuit, even in the presence of high frequency line interferences (e.g. caused by cutting in and out of mainly active loads). in the event of short line interruption ( 200 ms) the set circuit state with the external wiring shown in figure 4 will be maintained. after prolonged line outages ( v s C 3.6 v) the circuit will go into the off-state. upon line outage the synchronization of the internal logic with the line is lost. if the line outage lasts less than three line cycles, the phasing in of the pll becomes visible by a brief flickering. the setting of the pll can be influenced within certain limits by the selection that is made with c 5 and r 10. in general terms, smaller ratings for c 5 and larger ratings for r 10 will produce shorter settling times of the pll. with more inert pll characteristics there are slightly better values for rippe-control stability (visible fluctuations in brightness when operating incandescent lamps and with ripple-control signal on the line). if line outages last more than three line cycles, there is blanking for approx. 200 ms after the line recovers so that the settling process of the pll is not visible. operation of extensions long extension lines in installations cause voltages to be coupled in because of their stray capacitances and phase capacitances. internal limiting structures and appropriate evaluating logic ensure that the circuit can work without interference for stray and phase capacitances up to 100 nf. even voltage drops up to 10 v in the phase conductor between the circuit and the extension button being in phase with the dimming voltage have no effect on the working of the circuit. especially at operation with long extension lines, the rc-network r 10 , c 5 should be connected between pins 3 and 7 (figure 4) .
semiconductor group 9 slb 0587 application circuit (figure 4) the suggested circuit design of the slb 0587 performs the following functions: l current supply for the circuits ( r 1 , r 3 , c 2 , c 3 , c 6 , d1, d2). l filtered signal for synchronization of the internal time base (pll circuit) with line frequency ( r 2 , c 4 ). l for specific applications c 4 and r 2 can be varied according to figure 5 . an increase for c 4 and r 2 causes a slight reduction of the lamp brightness but at the same time an im- provement of interference immunity of the internal pll against line voltage spikes. l integration unit for internal pll circuit ( c 5 , r 10 ) combining r 10 and c 5 (figure 6) determines within certain limits the following factors C start-up behaviour of internal pll after line failure C ripple control behaviour (periodic shifts of lamp brightness if ripple control signals represent) l protection of the user ( r 8 , r 9 ) l sensitivity setting of the sensor ( r 7 ) l current limitation in the case of reverse polarity of the extension ( r 5 , r 6 ) both resistors can be omitted if no extension is connected. in this case pin 6 must be con- nected to v ss (pin 7). l d3: reduction of positive voltages which may arise during the triggered state at the gate of some triacs, to values below v dd + 0.3 v by diode forward voltage. if suitable triacs are used, diode d3 can be omitted. l dr, c 1 are used for emi suppression. depending on the application the emi suppression is to be dimensioned in acc. with vde 0875/part 1 (general) vde 0550/part 6 (chokes) or corresponding the national regulations e.g. 1.4....2 mh, q = 11....24
semiconductor group 10 slb 0587 figure 4 application circuit
semiconductor group 11 slb 0587 application notes figure 5 dependence of c 4 and maximum angle of current flow *) the capacitor value of c 4 is limited to max. 12 nf for a line frequency of 60 hz. figure 6 range of value of the rc-component at pin3 for stationary pll-operation
semiconductor group 12 slb 0587 figure 7 range of value for trigger current of pin 8 over temperature range
semiconductor group 13 slb 0587 operation of control inputs all switching and control functions can also be performed from extensions which are con- nected to the extension input. the main sensor input and the extension inputs have equal priority. electronic sensor switches or mechanical pushbutton switches can be connected to the extensions. input potential during both half waves of the line phase: functional description of the evaluation logic for sensor and extension inputs the logic levels at the sensor and extension inputs are sampled by latches l1 and l2 using the timing pattern shown in the timing diagram of figure 8 . for operation (on/off or change of brightness) flipflops ff1 to ff3 must be "1". minimum on/off times extension input: approx. 40 to 60 ms sensor input: approx. 40 to 60 ms line half wave sensor input function extension input l or dont care dont care l h positive l operated negative dont care not operated positive h operated negative dont care not operated
semiconductor group 14 slb 0587 figure 8 timing diagram of the evaluation logic for the sensor and extension inputs
semiconductor group 15 slb 0587 wireless remote control the connection of a wireless remote control to the extension is very easy. all functions of the slb 0587 can be performed with the aid of a single transfer channel. general information all time specifications refer to a line frequency of 50 hz. in case of a line frequency of 60 hz, the times are reduced accordingly. figure 9 circuit principle of the evaluation logic for the sensor and extension inputs
semiconductor group 16 slb 0587 functional description diodes d1 and d2 exhibit a behaviour similar to that of a z-diode and become conductive at approx. 3.0 v. despite of the line voltage at the triac, it is ensured in combination with r 2 (figure 4) that the voltages occuring at the sync input of the slb 0587 do not exceed essentially the range of the supply voltage. figure 10 circuit principle at the sync input
semiconductor group 17 slb 0587 functional description of the programming input (pin 2): the slb 0587 distinguishes between 3 operating modes if pin 2 is wired accordingly. the transistors t3 and t4 alternate in being conductive as shown in figure 11 . acceptance of the logic level (which is dependent on the external wiring of the input) at the pro- gramming input, is performed during the second edge of the load pulse. figure 11 circuit principle on programming input (pin 2)
semiconductor group 18 slb 0587 figure 12 internal timing for distinguishing between the operating modes a, b and c
semiconductor group 19 slb 0587 absolute maximum ratings v dd =0 v operating range characteristics t a = 25 c; v ss = C5 v ( v dd = 0 v ) *) load resistance between pin 1 and pin 8 total power dissipation ( t a = 25 c) parameter symbol min. max. unit limit values C 7.5 0.3 supply voltage v ss v v s C 0.3 0.3 input voltage v i v C 0.5 C1 0.5 1 input current: sync input extension input i i i i ma ma 125 junction temperature t j c 10 mw C 55 125 storage temperature t stg c 135 231 thermal resistance system-air (p-dip-8) system-air (p-dso-8-1) r th sa r th sa k/w k/w C 5.6 C 4.5 supply voltage v ss v 47.5 63 line frequency f hz 0 100 ambient temperature t a c parameter symbol min. max. unit test condition limit values typ. quiescent current, pin 1 i dd ma 0.5 0.65 dimmer off: f sync = 50 hz r l = 120 w *)
semiconductor group 20 slb 0587 characteristics (contd) t a =25 c; v ss = C 5 v ( v dd =0 v ) sensor input (pin 5) extension (pin 6) sync input (pin 4) parameter symbol min. max. unit test condition limit values typ. h-input voltage l-input voltage input current (extension) input current v ih v il i ih i ih i il 1/2 v ss + 1.1 C1 0 23 1/2 v ss C 1.1 0 1 v v m a m a m a 220 v at sensor (extension) v i = 0 v v i = v ss h-input voltage l-input voltage input current v ih v il i il v ss + 3.0 0 v ss + 0.8 1 v v m a v i = v ss h-input voltage l-input voltage input current hl transition time (trigger transition) lh transition time frequency v ih v il i ih t thl t tlh f 1/2 v ss + 1.8 207 supply sine wave 50/60 1/2 v ss + 1.8 v v m a hz application circuit line frequency
semiconductor group 21 slb 0587 characteristics (contd) t a =25 c; v ss = C 5 v ( v dd =0 v ) programming input (pin 2) integrator (pin 3) output (pin 8) parameter symbol min. max. unit test condition limit values typ. load capacitance load resistance mode b mode a; c c l r l r l 0 200 0 500 1 pf k w k w application circuit c 5 r 10 68 22 100 330 330 680 nf k w see figure 4 l-output current l-pulse width hl transition time lh transition time i ol t ql t hlq t hlq 25 117.2 97.7 65 200 1 ma m s m s ns m s v ql = C 3 v r l = 120 w 50 hz supply 60 hz supply r l = 120 w c l = 1 nf
semiconductor group 22 slb 0587 package outlines plastic package, p-dip-8 (plastic dual in-line package) plastic package, p-dso-8-1 (smd) (plastic dual small outline) smd = surface mounted device dimensions in mm

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